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NLSX3018 Datasheet PDF : 12 Pages
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NLSX3018
8-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX3018 is a 8−bit configurable dual−supply bidirectional
level translator without a direction control pin. The I/O VCC− and I/O
VL−ports are designed to track two different power supply rails, VCC
and VL respectively. The VCC supply rail is configurable from 1.3 V
to 4.5 V while the VL supply rail is configurable from 0.9 V to (VCC
− 0.4) V. This allows lower voltage logic signals on the VL side to be
translated into higher voltage logic signals on the VCC side, and
vice−versa. Both I/O ports are auto−sensing; thus, no direction pin is
required.
The Output Enable (EN) input, when Low, disables both I/O ports
by putting them in 3−state. This significantly reduces the supply
currents from both VCC and VL. The EN signal is designed to track
VL.
Features
• Wide High−Side VCC Operating Range: 1.3 V to 4.5 V
Wide Low−Side VL Operating Range: 0.9 V to (VCC − 0.4) V
• High−Speed with 100 Mb/s Guaranteed Date Rate for VL > 1.6 V
• Low Bit−to−Bit Skew
• Overvoltage Tolerant Enable and I/O Pins
• Non−preferential Powerup Sequencing
• Small packaging: 4.0 mm x 2.0 mm UQFN20
• This is a Pb−Free Device
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
PIN ASSIGNMENT
I/O VL1 1
I/O VL2 2
I/O VL3 3
I/O VL4 4
VL 5
EN 6
I/O VL5 7
I/O VL6 8
I/O VL7 9
I/O VL8 10
20 I/O VCC1
19 I/O VCC2
18 I/O VCC3
17 I/O VCC4
16 VCC
15 GND
14 I/O VCC5
13 I/O VCC6
12 I/O VCC7
11 I/O VCC8
(Top View)
http://onsemi.com
UQFN20
MU SUFFIX
CASE 517AK
MARKING
DIAGRAMS
LAM
G
LA = Specific Device Code
M = Date Code
G = Pb−Free Package
20
SOIC−20
DW SUFFIX
CASE 751D
NLSX3018
AWLYYWWG
1
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
TSSOP−20
DT SUFFIX
CASE 948E
NLSX
3018
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
1
June, 2009 − Rev. 0
Publication Order Number:
NLSX3018/D
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