UPD75P3216 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD75P3216

4-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

µPD75P3216

(3) Description of symbols used in addressing area

MB = MBE • MBS

*1

MBS = 0, 1, 15

*2 MB = 0

MBE = 0 : MB = 0 (000H to 07FH)

MB = 15 (F80H to FFFH)

*3

MBE = 1 : MB = MBS

MBS = 0, 1, 15

*4 MB = 15, fmem = FB0H to FBFH, FF0H to FFFH

*5 MB = 15, pmem = FC0H to FFFH

*6 addr = 0000H to 3FFFH

addr, addr1 = (Current PC) – 15 to (Current PC) – 1

*7

(Current PC) +2 to (Current PC) +16

caddr = 0000H to 0FFFH (PC13, 12 = 00B) or

1000H to 1FFFH (PC13, 12 = 01B) or

*8

2000H to 2FFFH (PC13, 12 = 10B) or

3000H to 3FFFH (PC13, 12 = 11B)

*9 faddr = 0000H to 07FFH

*10 taddr = 0020H to 007FH

*11 addr1 = 0000H to 3FFFH (Mk II mode only)

Remarks 1. MB indicates access-enabled memory banks.

2. In area *2, MB = 0 for both MBE and MBS.

3. In areas *4 and *5, MB = 15 for both MBE and MBS.

4. Areas *6 to *11 indicate corresponding address-enabled areas.

Data memory

addressing

Program memory

addressing

(4) Description of machine cycles

S indicates the number of machine cycles required for skipping of skip-specified instructions. The value of S varies

as shown below.

• No skip .................................................................... S = 0

• Skipped instruction is 1-byte or 2-byte instruction .. S = 1

• Skipped instruction is 3-byte instructionNote ........... S = 2

Note 3-byte instructions: BR !addr, BRA !addr1, CALL !addr, and CALLA !addr1

Caution The GETI instruction is skipped for one machine cycle.

One machine cycle equals one cycle (= tCY) of the CPU clock F. Use the PCC setting to select among four cycle

times.

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