R80C188XL-25 Просмотр технического описания (PDF) - Intel

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Компоненты Описание

производитель

R80C188XL-25

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Intel 

80C186XL 80C188XL

Pin

Name

PCS6 A2

DT R

DEN

NC

Pin

Type

O

O

O

Input

Type

Table 3 Pin Descriptions (Continued)

Output

States

Pin Description

H(1) H(X)

R(1)

Peripheral Chip Select 6 or Latched A2 may be programmed

to provide a seventh peripheral chip select or to provide an

internally latched A2 signal The address range activating

PCS6 is software-programmable PCS6 A2 does not float

during bus HOLD When programmed to provide latched A2

this pin will retain the previously latched value during HOLD

H(Z)

R(Z)

Data Transmit Receive controls the direction of data flow

through an external data bus transceiver When LOW data is

transferred to the procesor When HIGH the processor

places write data on the data bus

H(Z)

R(1 Z)

Data Enable is provided as a data bus transceiver output

enable DEN is active LOW during each memory and I O

access (including 80C187 access) DEN is HIGH whenever

DT R changes state During RESET DEN is driven HIGH for

one clock then floated

Not connected To maintain compatibility with future

products do not connect to these pins

NOTE

Pin names in parentheses apply to the 80C188XL

15

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