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PBL38650-2 Просмотр технического описания (PDF) - Ericsson

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PBL38650-2 Datasheet PDF : 16 Pages
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PBL 386 50/2
The TISPPBL2 is a dual forward-
conducting buffered p-gate overvoltage
protector. The protector gate references
the protection (clamping) voltage to
negative supply voltage (i e the battery
voltage, VB ). As the protection voltage
will track the negative supply voltage the
overvoltage stress on the SLIC is
minimized.
Positive overvoltages are clamped to
ground by a diode. Negative
overvoltages are initially clamped close
to the SLIC negative supply rail voltage
and the protector will crowbar into a low
voltage on-state condition, by firing an
internal thyristor.
A gate decoupling capacitor, CGG, is
needed to carry enough charge to supply
a high enough current to quickly turn on
the thyristor in the protector. CGG shall be
placed close to the overvoltage
protection device. Without the capacitor
even the low inductance in the track to
the VBat supply will limit the current and
delay the activation of the thyristor
clamp.
The fuse resistors RF serve the dual
purposes of being non- destructive
energy dissipators, when transients are
clamped and of being fuses, when the
line is exposed to a power cross.
If a PTC is choosen for RF, note that it
is important to always use PTC´s in
series with resistors not sensitive to
temperature, as the PTC will act as a
capacitance for fast transients and
therefore will not protect the SLIC.
Power-up Sequence
No special power-up sequence is
necessary except that ground has to be
present before all power supply voltages.
Printed Circuit Board Layout
Care in PCB layout is essential for
proper function. The components
connecting to the RSN input should be
placed in close proximity to that pin, so
that no interference is injected into the
RSN pin. Ground plane surrounding the
RSN pin is advisable.
Analog ground (AGND) should be
connected to battery ground (BGND) on
the PCB in one point.
The capacitors for the battery should
be connected with short wide leads of the
same length.
Ordering Information
Package
Temp. Range
24 pin SSOP Tape & Reel 0° - +70° C
24 pin SOIC Tube
0° - +70° C
24 pin SOIC Tape & Reel 0° - +70° C
28 pin PLCC Tube
0° - +70° C
28 pin PLCC Tape & Reel 0° - +70° C
Part No.
PBL 386 50/2SHT
PBL 386 50/2SOS
PBL 386 50/2SOT
PBL 386 50/2QNS
PBL 386 50/2QNT
Information given in this data sheet is believed to be
accurate and reliable. However no responsibility is
assumed for the consequences of its use nor for any
infringement of patents or other rights of third parties
which may result from its use. No license is granted
by implication or otherwise under any patent or
patent rights of Ericsson Microelectronics. These
products are sold only according to Ericsson
Microelectronics' general conditions of sale, unless
otherwise confirmed in writing.
Specifications subject to change without
notice.
1522-PBL 386 50/2 Uen Rev. A
© Ericsson Microelectronics AB 1999
This product is an original Ericsson
product protected by US, European and
other patents.
Ericsson Microelectronics AB
SE-164 81 Kista-Stockholm, Sweden
Telephone: +46 8 757 50 00
16

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