MAX9205(2001) Просмотр технического описания (PDF) - Maxim Integrated

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MAX9205
(Rev.:2001)

10-Bit Bus LVDS Serializers

Maxim Integrated 

10-Bit Bus LVDS Serializers

OUT+

OUT-

10pF

RL

VDIFF

10pF

VDIFF = (OUT+) - (OUT-)

80%

20%

tLHT

Figure 4. Output Load and Transition Times

tTCP

TCLK

1.5V

1.5V

80%

20%

tHLT

VDIFF = 0

1.5V

tS

IN_

1.5V

tH

1.5V

TIMING SHOWN FOR TCLK_R/F = LOW

Figure 5. Data Input Setup and Hold Times

PARASITIC PACKAGE AND

TRACE CAPACITANCE

OUT+

OUT-

EN

10pF

13.5Ω

+1.1V

13.5Ω

10pF

3V

EN

0

VOH

OUT±

VOL

1.5V

tHZ

50%

tLZ

50%

1.5V

tZH

50%

1.1V

tZL

1.1V

50%

Figure 6. High-Impedance Test Circuit and Timing

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