MAX5073 Просмотр технического описания (PDF) - Maxim Integrated

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MAX5073

2.2MHz, Dual-Output Buck or Boost Converter with Internal Power MOSFETs

Maxim Integrated 

2.2MHz, Dual-Output Buck or Boost Converter

with Internal Power MOSFETs

OUTPUT2

2.5V/1A

VL

INPUT

PGOOD2

CLOCK

OUT

ON

OFF

28 27 26 25 24 23 22

SOURCE2 PGND SGND SOURCE1 PGOOD2

1 CLKOUT

PGOOD1 21

2 BST2/VDD2

EP

SGND

BST1/VDD1 20

3 DRAIN2

DRAIN1 19

4 DRAIN2

5 EN2

MAX5073

DRAIN1 18

EN1 17

6 FB2

FB1 16

7 COMP2

COMP1 15

SYNC N.C. OSC V+ VL VL BYPASS

8 9 10 11 12 13 14

OUTPUT1

3.3V/2A

VL

INPUT

ON

OFF

SGND

VIN = 5.5V TO 23V

SYSTEM

CLOCK

PGND

Figure 1. MAX5073 Dual Buck Regulator Application Circuit

Detailed Description

PWM Controller

The MAX5073 converter uses a pulse-width modulation

(PWM) voltage-mode control scheme for each out-of-

phase controller. It is nonsynchronous rectification and

uses an external low-forward-drop Schottky diode for

rectification. The controller generates the clock signal

by dividing down the internal oscillator or the SYNC

input when driven by an external clock, so each con-

troller’s switching frequency equals half the oscillator

frequency (fSW = fOSC / 2). An internal transconduc-

tance error amplifier produces an integrated error volt-

age at the COMP pin, providing high DC accuracy. The

voltage at COMP sets the duty cycle using a PWM

comparator and a ramp generator. At each rising edge

of the clock, converter 1’s high-side n-channel MOSFET

turns on and remains on until either the appropriate or

maximum duty cycle is reached, or the maximum cur-

rent limit for the switch is detected. Converter 2 oper-

ates out-of-phase, so the second high-side MOSFET

turns on at each falling edge of the clock.

In the case of buck operation (Figure 1), during each

high-side MOSFET’s on-time, the associated inductor cur-

SGND

*CONNECT PGND AND SGND TOGETHER AT ONE POINT NEAR THE

RETURN TERMINALS OF THE V+ AND VL BYPASS CAPACITORS.

rent ramps up. During the second half of the switching

cycle, the high-side MOSFET turns off and forward biases

the Schottky rectifier. During this time, the SOURCE volt-

age is clamped to 0.4V (VD) below ground. The inductor

releases the stored energy as its current ramps down,

and provides current to the output. The bootstrap capaci-

tor is also recharged from the inductance energy when

the MOSFET turns off. The circuit goes in discontinuous

conduction mode operation at light load, when the induc-

tor current completely discharges before the next cycle

commences. Under overload conditions, when the induc-

tor current exceeds the peak current limit of the respec-

tive switch, the high-side MOSFET turns off quickly and

waits until the next clock cycle.

In the case of boost operation, the MOSFET is a low-

side switch (Figure 8). During each on-time, the induc-

tor current ramps up. During the second half of the

switching cycle, the low-side switch turns off and for-

ward biases the Schottky diode. During this time, the

DRAIN voltage is clamped to 0.4V (VD) above VOUT_

and the inductor provides energy to the output as well

as replenishes the output capacitor charge.

10 ______________________________________________________________________________________

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