FDC37N869 Просмотр технического описания (PDF) - SMSC -> Microchip

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FDC37N869

5V and 3.3V Super I/O Controller with Infrared Support for Portable Applications

SMSC -> Microchip 

STATUS REGISTER B (SRB)

Status Register B (Base Address + 1) is read-only and monitors the state of several disk interface pins in PS/2

interface mode (Table 7) and Model 30 interface mode (Table 8). SRB can be accessed at any time when in these

modes. During a read in PC/AT interface mode the data bus pins D0 - D7 are held in a high impedance state.

PS/2 Interface Mode

7

1

RESET

1

CONDITION

Table 7 - SRB PS/2 Mode

6

5

4

3

2

1

0

1

DRIVE WDATA RDATA WGATE MOT EN1 MOT EN0

SEL0 TOGGLE TOGGLE

1

0

0

0

0

0

0

Motor Enable 0, Bit 0

Active high status of the MTR0 disk interface output pin. This bit is low after a hardware reset and unaffected by a

software reset.

Motor Enable 1, Bit 1

Active high status of the MTR1 disk interface output pin. This bit is low after a hardware reset and unaffected by a

software reset.

Write Gate, Bit 2

Active high status of the WGATE disk interface output.

Read Data Toggle, Bit 3

Every inactive edge of the RDATA input causes this bit to change state.

Write Data Toggle, Bit 4

Every inactive edge of the WDATA input causes this bit to change state.

Drive Select 0, Bit 5

Reflects the status of the Drive Select 0 bit of the DOR (address 3F2 bit 0). This bit is cleared after a hardware

reset, it is unaffected by a software reset.

Reserved, Bits 6 - 7

Always read as a logic “1”.

SMSC DS – FDC37N869

Page 21

Rev. 11/09/2000

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