CY3682(2004) Просмотр технического описания (PDF) - Cypress Semiconductor
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CY3682 Datasheet PDF : 42 Pages
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FO R
FO R
CY7C68001
11.3 FIFO Interface
11.3.1 Slave FIFO Synchronous Read
IFCLK
SLRD
FLAGS
DATA
SLOE
tIFCLK
tSRD
tRDH
tXFLG
N
tOEon
N+1
tXFD
tOEoff
Figure 11-5. Slave FIFO Synchronous Read Timing Diagram[12]
Table 11-7. Slave FIFO Synchronous Read with Internally Sourced IFCLK[13]
Parameter
Description
Min.
tIFCLK
tSRD
tRDH
tOEon
tOEoff
tXFLG
tXFD
IFCLK Period
SLRD to Clock Set-up Time
Clock to SLRD Hold Time
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
Clock to FLAGS Output Propagation Delay
Clock to FIFO Data Output Propagation Delay
20.83
18.7
0
Table 11-8. Slave FIFO Synchronous Read with Externally Sourced IFCLK[13]
Parameter
tIFCLK
tSRD
tRDH
tOEon
tOEoff
tXFLG
tXFD
Description
IFCLK Period
SLRD to Clock Set-up Time
Clock to SLRD Hold Time
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
Clock to FLAGS Output Propagation Delay
Clock to FIFO Data Output Propagation Delay
Min.
20
12.7
3.7
Max.
10.5
10.5
9.5
11
Max.
200
10.5
10.5
13.5
15
Unit
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
Document #: 38-08013 Rev. *E
Page 26 of 42
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