CY7C1318BV18(2004) Просмотр технического описания (PDF) - Cypress Semiconductor
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производитель
CY7C1318BV18 Datasheet PDF : 24 Pages
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PRELIMINARY
CY7C1316BV18
CY7C1916BV18
CY7C1318BV18
CY7C1320BV18
Identification Register Definitions
Instruction
Field
Revision
Number (31:29)
Cypress Device
ID (28:12)
Cypress JEDEC
ID (11:1)
ID Register
Presence (0)
CY7C1316BV18
000
11010100010000101
00000110100
1
Value
CY7C1916BV18
CY7C1318BV18
000
000
CY7C1320BV18 Description
000
Version number.
11010100010001101 11010100010010101 11010100010100101 Defines the type
of SRAM.
00000110100
00000110100
00000110100
Allows unique
identification of
SRAM vendor.
1
1
1
Indicate the
presence of an
ID register.
Scan Register Sizes
Register Name
Instruction
Bypass
ID
Boundary Scan
Bit Size
3
1
32
107
Instruction Codes
Instruction
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Code
000
001
010
011
100
101
110
111
Description
Captures the Input/Output ring contents.
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operation.
Captures the Input/Output contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures the Input/Output ring contents. Places the boundary scan register between TDI and
TDO. Does not affect the SRAM operation.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM operation.
Boundary Scan Order
Bit #
0
1
2
3
4
5
6
7
8
9
10
11
Bump ID
6R
6P
6N
7P
7N
7R
8R
8P
9R
11P
10P
10N
Boundary Scan Order (continued)
Bit #
Bump ID
12
9P
13
10M
14
11N
15
9M
16
9N
17
11L
18
11M
19
9L
20
10L
21
11K
22
10K
23
9J
Document Number: 38-05621 Rev. **
Page 21 of 24
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