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SSD0858Z Просмотр технического описания (PDF) - Solomon Systech

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SSD0858Z Datasheet PDF : 45 Pages
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enable
Oscillation Circuit
Oscillator
enable
enable
Buffer
(CL)
OSC1
Internal Resistor
OSC2
Figure 3 - Oscillator Circuitry
7.5 LCD Driving Voltage Generator and Regulator
This module generates the LCD voltage needed for display output. It takes a single supply input
and generates necessary bias voltages.
It consists of:
1. 2X, 3X, 4X and 5X DC-DC voltage converter
2. Bias Divider
If the output op-amp buffer option in Set Power Control Register command is enabled, this
circuit block will divide the regulator output (VOUT) to give the LCD driving levels (VL2 - VL5).
The divider does not require external capacitors that reduce the external hardware and pin
counts.
3. Contrast Control
Software control of 64 voltage levels of LCD voltage.
4. Bias Ratio Selection circuitry
Software control of 1/4 to 1/9 bias ratio to match the characteristic of LCD panel.
5. Self adjust temperature compensation circuitry
Provide 5 different compensation grade selections to satisfy the various liquid crystal
temperature grades. The grading can be selected by software control. Defaulted temperature
coefficient (TC) value is -0.14%/°C.
7.6 169 Bits Latch
A register carries the display signal information. In 104 X 65 display-mode, data will be fed to the
HV-buffer Cell and level-shifted to the required level.
7.7 Level selector
Level Selector is a control of the display synchronization. Display voltage can be separated into
two sets and used with different cycles. Synchronization is important since it selects the required
LCD voltage level to the HV Buffer Cell, which in turn outputs the COM or SEG LCD waveform.
7.8 HV Buffer Cell (Level Shifter)
HV Buffer Cell works as a level shifter, which translated the low voltage output signal to the
required driving voltage. The output is shifted out with an internal FRM clock, which comes from
the Display Timing Generator. The voltage levels are given by the level selector, which is
synchronized with the internal M signal.
13
SSD0858
Rev 1.0
11/2002
SOLOMON

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