GL800USB Просмотр технического описания (PDF) - Genesys Logic

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производитель

GL800USB

3.3 V, USB 2.0 UTMI compliant transceiver

Genesys Logic 

GL800USB - USB2.0 UTMI COMPLIANT TRANSCEIVER

CLKOUT

RXACTV

Data

RXVLD

RXERR

DP/DM

PID Data Data Data Data CRC CRC

SYNC PID Data Data Data Data CRC CRC EOP

Note that the USB 2.0 transceiver does not decode Packet ID’s (PIDs). They are passed

to the SIE for decoding.

This timing example is in HS mode. When a HS/FS UTM is in FS mode there are

approximately 40 clock cycles every byte time. The Receive State Machine assumes that

the SIE captures the data on the data bus if RXACTV and RXVLD are asserted. In FS

mode, RXVLD will only be asserted for one clock per byte time.

Note that the receive and transmit sections of the transceiver operate independently. The

receiver will receive any packets on the USB. The transceiver does not identify whether

the packet that it is receiving from the upstream or the downstream port. The SIE must

ignore receive data while it is transmitting.

©2000-2001 Genesys Logic Inc.—All rights reserved.

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