RTD2120K Просмотр технического описания (PDF) - Realtek Semiconductor

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RTD2120K

8051 Embedded Micro-Controller for Monitor

Realtek Semiconductor 

Realtek

RTD2120-series

Name

Bits

Read/Write Reset State Comments

ADC1_CONV 7:2

R

_DATA

reserved

1:0

--

3F

Converted data of ADC1

00

Register::ADC2_convert_result

0xFF0E

Name

Bits

Read/Write Reset State Comments

ADC2_CONV 7:2

R

_DATA

reserved

1:0

--

3F

Converted data of ADC2

00

Register::ADC3_convert_result

0xFF0F

Name

Bits

Read/Write Reset State Comments

ADC3_CONV 7:2

R

_DATA

reserved

1:0

--

3F

Converted data of ADC3

00

PLL

RTD2120 contains a PLL to make the whole chip operate at higher or lower speed for different

demands. After reset, RTD2120 uses crystal frequency as the system clock. User can program the PLL

to operate at the desired frequency and select system clock to PLL output by setting MCU_CLK_SEL.

RTD2120 will switch system clock to PLL output only when PLL is stable. Moreover, the divider is

glitch free so user can modify its value at any time.For normal operation, user must choose the crystal

whose frequency is between 11M and 27MHz . Besides, VCO frequency must be programmed

between 40M and 80MHz.

Note: Fvco = Xtal *(M/N) , where M=M_code+1, N=N_code+1.

MCU_CLK_SEL

Crystal

N

11M~27MHz

PFD

PUMP

VCO

40M~80MHz

M

DIV

MCU_CLK

confidential

21

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