ATtiny43U
Table of Contents
Features ..................................................................................................... 1
1 Pin Configurations ................................................................................... 2
1.1 Pin Descriptions .................................................................................................2
2 Overview ................................................................................................... 4
3 About ......................................................................................................... 6
3.1 Resources .........................................................................................................6
3.2 Code Examples .................................................................................................6
3.3 Data Retention ...................................................................................................6
3.4 Disclaimer ..........................................................................................................6
4 AVR CPU Core .......................................................................................... 7
4.1 Introduction ........................................................................................................7
4.2 Architectural Overview .......................................................................................7
4.3 ALU – Arithmetic Logic Unit ...............................................................................8
4.4 Status Register ..................................................................................................8
4.5 General Purpose Register File ........................................................................10
4.6 Stack Pointer ...................................................................................................11
4.7 Instruction Execution Timing ...........................................................................12
4.8 Reset and Interrupt Handling ...........................................................................13
5 Memories ................................................................................................ 15
5.1 In-System Re-programmable Flash Program Memory ....................................15
5.2 SRAM Data Memory ........................................................................................15
5.3 EEPROM Data Memory ..................................................................................16
5.4 I/O Memory ......................................................................................................20
5.5 Register Description ........................................................................................20
6 System Clock and Clock Options ......................................................... 23
6.1 Clock Systems and their Distribution ...............................................................23
6.2 Clock Sources .................................................................................................24
6.3 System Clock Prescaler ..................................................................................27
6.4 Clock Output Buffer .........................................................................................28
6.5 Register Description ........................................................................................28
7 Power Management and Sleep Modes ................................................. 30
7.1 Sleep Modes ....................................................................................................30
i
8048C–AVR–02/12