Z80182 Просмотр технического описания (PDF) - Zilog

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производитель

Z80182

ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog 

Zilog

PRELIMINARY

CSI/O REGISTERS

CNTR

Bit EF EIE RE TE -

Upon Reset 0

0

0

0

1

R/W R R/W R/W R/W

Addr 0AH

SS2 SS1 SS0

1 11

R/W R/W R/W

Z80182/Z8L182

ZILOG INTELLIGENT PERIPHERAL

Speed Select

Transmit Enable

Receive Enable

End Interrupt Enable

End Flag

SS2, 1, 0

000

001

010

011

Baud Rate

Ø ÷ 20

Ø ÷ 40

Ø ÷ 80

Ø ÷ 100

SS2, 1, 0

100

101

110

111

Figure 21. CSI/O Control Register

Baud Rate

Ø ÷ 320

Ø ÷ 640

Ø ÷ 1280

External Clock

(Frequency < Ø ÷ 20)

TRDR

Read/Write

Addr 0BH

7 6 54 3 21 0

Read - Received Data

Write - Transmit Data

Figure 22. CSI/O Transmit/Receive Data Register

DS971820600

PS009801-0301

3-35

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