TEA5040S Просмотр технического описания (PDF) - STMicroelectronics
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TEA5040S Datasheet PDF : 12 Pages
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TEA5040S
BLOCK DIAGRAM
VIDEO
INT EXT OUT
39 37 40
32
INT SYNC. 41
42
DELAY
T IME
Y
12
(R - Y) 11
(B - Y) 10
VIDEO
SWITCH
SUPE R
SAND CASTLE
DETECTOR
R2
R’ 3
G4
G’ 5
B6
B’ 7
R
Y
G
(R - Y)
B
(B - Y)
DATA
EN
CLK
14
15
13
BUS
DECODER
V REF
36
38
BEA M
CURRENT
LIMIT
CONTRAST
BRIGHTNESS Y
SAT .
SAT .
(R - Y)
(B - Y)
LOGIC
25 ROUT
28 GOUT
31 B OUT
1
+ 12V
GENERAL DESCRIPTION
Brief Description
This integrated circuit incorporates the following
features :
- a synchro and two video inputs
- a fixed video output
- a switchable video output
- normal Y, R-Y, B-Y TV mode inputs
- double set of R, G, B inputs
- brightness, contrast and saturation controls as
well on a R, G, B picture as on a normal TV picture
- digital control inputs by means of serial bus
- peak beam current limitation
- average beam current limitation
- automatic drive and cut-off controls
Block Diagram Description
BUS DECODER
A 3 lines bus (clock, data, enable) delivered by the
23
X3
DRIVE
MEMORIES
24 33
34
X3
CATHODE
CURRENTS
CUT OFF
MEMO RIES
microcontroller of the TV-set enters the videoproc-
essor integrated circuit (pins 13-14-15). A control
system acts in such a way that only a 9-bit word is
taken intoaccount by the videoprocessor. Six of the
bits carry the data, the remaining three carry the
address of the subsystem.
Fun ction
Brightness Control
Address
0
Number of
Bits
5
Contrast Control
1
5
Colour on/off Selection
2
1
Insertion Allowed
3
1
Sync/Async Mode
4
1
Int/Ext Video Switching
5
1
B-Y Saturation Control
6
6
R-Y Saturation Control
7
6
2/12
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