DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

HI5741BIBZ-T Просмотр технического описания (PDF) - Intersil

Номер в каталоге
Компоненты Описание
производитель
HI5741BIBZ-T Datasheet PDF : 13 Pages
First Prev 11 12 13
HI5741
Signal to Noise Ratio (SNR) is the ratio of a fundamental to
the noise floor of the analog output. The first 5 harmonics
are ignored, and an output filter of 1/2 the clock frequency is
used to eliminate alias products.
Total Harmonic Distortion (THD) is the ratio of the DAC
output fundamental to the RMS sum of the harmonics. The
first 5 harmonics are included, and an output filter of 1/2 the
clock frequency is used to eliminate alias products.
Spurious Free Dynamic Range (SFDR) is the amplitude
difference from a fundamental to the largest harmonically or
non-harmonically related spur. A sine wave is loaded into
the D/A and the output filtered at 1/2 the clock frequency to
eliminate noise from clocking alias terms.
Multi-Tone Power Ratio (MTPR) is the amplitude difference
from peak amplitude to peak distortion (either harmonic or
non-harmonic). An 8 tone pattern is loaded into the D/A. The
tone spacing of this pattern (f) is created such that tones 1
through 4 and 5 through 8 are spaced equally, with tones 4
and 5 spaced at 2f. MTPR is measured as the dynamic
range from peak power to peak distortion in the 2f gap.
Intermodulation Distortion (IMD) is the measure of the
sum and difference products produced when a two tone
input is driven into the D/A. The distortion products created
will arise at sum and difference frequencies of the two tones.
IMD can be calculated using the following equation:
IMD = 2----0----L---o----g------(--R----M-----S------o---f---S----u----m------a----n---d-----D----i--f-f--e---r--e----n---c---e-----D----i--s---t-o----r--t-i--o---n-----P----r--o----d---u---c---t--s---)
(RMS Amplitude of the Fundamental)
BASEBAND
BIT
STREAM
33 MSPS K9
CLK C11
ENCODER
B11
C10
A11
F10
F9
F11
H11
G11
G9
J11
G10
CONTROLLER
D10
VCC J10
K11
B8
A8
B6
B7
A7
C7
C6
A6
A5
C5
A4
B4
A3
A2
B3
A1
B10
B9
A10
E11
E9
VCC H10
K2
VCC J2
U2
CLK
MOD2
MOD1
MOD0
L1
PMSEL DACSTRB
ENPOREG
ENOFREG
ENCFREG
ENPHAC
ENTIREG
INHOFR
INITPAC
INITTAC
TEST
PARSER
BINFMT
SIN15
SIN14
SIN13
SIN12
SIN11
SIN10
SIN9
SIN8
SIN7
SIN6
SIN5
SIN4
SIN3
SIN2
SIN1
K3
L2
L3
L4
J5
K5
L5
K6
J6
J7
L7
L6
L8
K8
L9
C15_MSB SIN0 L10
C4
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
A2
A1
A0
CS
COS15
COS14
COS13
COS12
COS11
COS10
COS9
COS8
COS7
COS6
COS5
COS4
COS3
COS2
COS1
COS0
C2
B1
C1
D1
E3
E2
E1
F2
F3
G3
G1
G2
H1
H2
J1
K1
WR
PACI
TICO B2
U1
VCC 16 DVCC
IOUT 21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D13 (MSB)
D12
D11
IOUT/
D10
D9
D8 C AMP IN
D7
D6 C AMP OUT
D5
D4
D3
D2
D1 REF OUT
D0 (LSB)
20
24
25
26
15 CLK
23
RSET
R4
50
28 DGND
17
ARET 19
DGND
AVSS 27
FILTER
R1
TO RF
UP-CONVERT
STAGE
64
R2
64
C2 0.1µF -5.2V_A
-5.2V_A
C1 0.01µF
R3
976
18 DVEE
-5.2V_D
AVEE 22 -5.2V_A
HI5741
-5.2V_D
L1
10µH
-5.2V_A
L2
10µH
OES
OEC
HSP45106
FIGURE 27. PSK MODULATOR USING THE HI5741 AND HSP45106 16-BIT NCO
12
FN4071.12
September 20, 2006

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]