DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

TPU2735 Просмотр технического описания (PDF) - Micronas

Номер в каталоге
Компоненты Описание
производитель
TPU2735
Micronas
Micronas Micronas
TPU2735 Datasheet PDF : 37 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
TPU 2735
5. RAM Organization
The external RAM is a 64 kbit or 256 kbit dynamic RAM.
A RAM sector is defined as 8 kbit and is capable to store
the information of one teletext page.
A 64 kbit RAM holds 8 sectors, a 256 kbit RAM is organ-
ized as 4 blocks of 8 sectors.
A RAM sector is organized in 25 rows of 40 bytes (row
0 to row 24) and one row of 24 bytes (row 25). The first
8 bytes of row 0 and the first 11 bytes of row 25 of each
sector contain control and status information for the
stored teletext page.
Row 24 of sector 0 in block 0 is used as a register for con-
trol information from the control microprocessor. When
the TPU2735 is used in FLOF mode sector 0 of each
block is used to store row 27 teletext information. In the
extended character set (ECS) mode the TPU2735
stores row 26 information in the sector preceding the
current acquisition sector. RAM organization is summa-
rized in the following table:
Table 5–1: Memory Organization of Sector N Block M
Row Number
row 0
row 1
.
.
row 14
row 15
row 16
row 17
row 18
.
.
row 23
row 24
row 24
row 26 des.code 0 of sector N+1
row 26 des.code 1 of sector N+1
.
.
row 26 des.code 14 of sector N+1
row 8/30*
rolling header
row 27* of ttx page in sector 1
row 27* of ttx page in sector 2
.
.
row 27* of ttx page in sector 7
register chain 2
rolling header
*) only designation code 000X is stored
in ECS mode, N even only
in sector 0, block 0 only
FLOF, ECS mode, sector 0, block 0 only
in sector 0, block 0 ... 3
in sector 0, block 0 only
in sector 1, block 0 if FLOF, ECS are not selected
Column
Row 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
Control Bits
Time
Teletext Data
Register Chain 2
Register Chain 1
Fig. 5–1: Organization for 64 Kbit RAM, divided into 8 sectors, sector 0 shown
16

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]