MTL003 Просмотр технического описания (PDF) - Myson Century Inc

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производитель

MTL003

SXGA Flat Panel Controller

Myson Century Inc 

MYSON

TECHNOLOGY

MTL003

(Rev. 0.95)

3.6 On-Chip PLL

General Description

The MTL003 needs three clock sources to drive synchronous circuits on chip. These clocks are generated

from the internal Phase Lock Loop (PLL) circuits with reference to the oscillator clock which is applied to pin

XI and XO by an external quartz crystal at 14.31818 MHz. The first one is the same as to the oscillator clock

at frequency (14.31818 MHz) to detect and measure graphic vertical and horizontal SYNC Frequency,

Polarity as well as Presence. The second is memory clock to synchronize memory controller with the external

frame buffers. The third is the display clock for display controller on chip and output signals to LCD panel.

3.6.1 Reference Clock

It is the counting basis of counter values in SYNC Processor such as VS and HS period count registers; that

is, the read back values from these registers must multiply the period of this clock to estimate VS and HS

frequency. Incorporating with polarity and frequency information of VS and HS, it can show the input graphic

image mode and pixel clock frequency.

3.6.2 Memory Clock

This clock is the synchronous clock for the external frame buffer. To accomplish the different DRAM types,

configuration and bandwidth needed for various applications, the memory clock can be set from 50 MHz to

118 MHz by means of adjusting a set of appropriate values for M, N and R. The formula for calculating the

desired frequency of the memory clock is as follows:

fmclk = fosc5(M+2)/(N+2)51/R

Where fmclk

fosc

M

N

R

: the desired memory clock

: oscillator clock with 14.31818 MHz

: post-divider ratio

: pre-divider ratio

: optional divider ratio

3.6.3 Display Clock

This clock is the synchronous clock for LCD panel. According to the LCD panel resolution of applications, the

display clock range is from 50 MHz to 160 MHz by means of choosing a set of appropriate values for M, N as

well as R. The computing formula is exactly the same as for the memory clock.

Revision 0.95

- 21 -

2000/06/14

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