LRI512 Просмотр технического описания (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

LRI512

EOF When Using Two Subcarriers

High Data Rate. EOF comprises 3 parts: (see

Figure 26)

– a logic 0 which starts with 8 pulses of

423.75 kHz followed by 9 pulses of 484.28 kHz,

– 24 pulses of 423.75 kHz (fc/32),

– 27 pulses of 484.28 kHz (fc/28).

Low Data Rate. EOF comprises 3 parts: (see

Figure 27)

– a logic 0 which starts with 32 pulses of

423.75 kHz followed by 36 pulses of

484.28 kHz,

– 96 pulses of 423.75 kHz (fc/32),

– 108 pulses of 484.28 kHz (fc/28).

Figure 26. End of Frame, High Data Rate, Two Subcarriers

37.46 µs

112.39 µs

Figure 27. End of Frame, Low Data Rate, Two Subcarriers

AI06677

151.62 µs (ISO=149.86 µs)

449.56 µs

AI06678

14/54

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