Z80185 Просмотр технического описания (PDF) - Zilog

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Компоненты Описание

производитель

Z80185

SMART PERIPHERAL CONTROLLERS

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Zilog

PRELIMINARY

AC CHARACTERISTICS (Continued)

φ

Port 2

Output

Control

Output

Control

Input

Port 2

Input

1

2

4

3

6

5

Z80185/Z80195

SMART PERIPHERAL CONTROLLERS

Figure 20. P1284 Bidirectional Centronics Interface Timing

P1284 Bidirectional Centronics Interface Timing

No.

Parameter

1

CLK High to Port 2 Output

2

CLK High to Control Output

3

Setup Time for Control Input to

CLK High for Guaranteed Recognition

4

Hold Time for Control Input from

CLK High for Guaranteed Recognition

5

Setup Time for Port 2 Inputs to

CLK High for Guaranteed Recognition

6

Hold Time for Port 2 Inputs to

CLK High for Guaranteed Recognition

Min

Max

Units

Notes

12

ns

12

ns

[1]

10

ns

[2]

5

ns

[2]

10

ns

5

ns

Notes:

[1]

Control Outputs

Peripheral Mode

Host Mode

[2]

Host Mode

Control Inputs

Peripheral Mode

Busy/PtrBusy/PeriphAck

nAck/PtrClk/PeriphClk

PError/AckDataReq/nAckReverse

nFault/nDataAvail/nPeriphRequest

Select/Xflag

nStrobe/HostClk

nAutoFd/HostBusy/HostAck

nSelectIn/P1284Active

nInit/nReverseRequest

Busy/PtrBusy/PeriphAck

nAck/PtrClk/PeriphClk

PError/AckDataReq/nAckReverse

nFault/nDataAvail/nPeriphRequest

Select/Xflag

nStrobe/HostClk

nAutoFd/HostBusy/HostAck

nSelectIn/P1284Active

nInit/nReverseRequest

22

DS971850301

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