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PM5352-BI Просмотр технического описания (PDF) - PMC-Sierra

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PM5352-BI Datasheet PDF : 77 Pages
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DATA SHEET
PMC-1990421
ISSUE 2
PM5352 S/UNI STAR
SATURN USER NETWORK INTERFACE 155 (STAR)
6.2 Section and Line Status DCC Signals
Pin Name
RSD
RSDCLK
TSD
TSDCLK
RLD
RLDCLK
TLD
TLDCLK
Type Pin
No.
Function
Output
Output
Input
Output
Output
Output
Input
Output
AB18
AC21
AB7
AA10
AA16
AB19
AA9
AA11
The receive section DCC (RSD) signal contains the
section data communications channel (D1-D3)
The receive section DCC clock (RSDCLK) is used
to clock out the section DCC.
RSDCLK is a 192 kHz clock used to update the
RSD output. RSDCLK is generated by gapping a
216 kHz clock.
The transmit section DCC (TSD) signal contains the
section data communications channel (D1-D3).
TSD is sampled on the rising edge of TSDCLK.
The transmit section DCC clock (TSDCLK) is used
to clock in the section DCC.
TSDCLK is a 192 kHz clock used to sample the
TSD input. TSDCLK is generated by gapping a 216
kHz clock.
The receive line DCC (RLD) signal contains the line
data communications channel (D4-D12).
The receive line DCC clock (RLDCLK) is used to
clock out the line DCC.
RLDCLK is a 576 kHz clock used to update the
RLD output. RLDCLK is generated by gapping a
2.16 MHz clock.
The transmit line DCC (TLD) signal contains the
line data communications channel (D4-D12).
TLD is sampled on the rising edge of TLDCLK.
The transmit line DCC clock (TLDCLK) is used to
clock in the line DCC.
TLDCLK is a 576 kHz clock used to sample the
TLD input. TLDCLK is generated by gapping a 2.16
MHz clock.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 14

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