A29L160 Просмотр технического описания (PDF) - AMIC Technology

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Компоненты Описание

производитель

A29L160

2M X 8 Bit / 1M X 16 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory

AMIC Technology 

A29L160 Series

Table 9. A29L160 Command Definitions

Command

Sequence

(Note 1)

Read (Note 6)

Reset (Note 7)

Manufacturer ID

Device ID,

Top Boot Block

Device ID,

Bottom Boot Block

Continuation ID

First

Second

Addr Data Addr Data

1 RA RD

1 XXX F0

Word

Byte

4

555

AAA

AA

2AA

555

55

Word

555

2AA

Byte 4 AAA AA 555 55

Word

Byte

4

555

AAA

AA

2AA

555

55

Word

Byte

4

555

AAA

AA

2AA

555

55

Bus Cycles (Notes 2 - 5)

Third

Fourth

Fifth

Addr Data Addr Data Addr Data

555

AAA

90

555

AAA 90

555

AAA

90

555

AAA

90

X00 37

X01 B3A8

X02 A8

X01 B329

X02 29

X03

X06

7F

Sixth

Addr Data

Sector Protect Verify Word

555

2AA

(Note 9)

4

AA

55

Byte

AAA

555

(SA) XX00

555

X02 XX01

90 (SA) 00

AAA

X04 01

CFI Query (Note 10)

Word

Byte

1

55

AA

98

Program

Byte

555

2AA 55

Byte 4 AAA AA 555

555 A0 PA PD

AAA

Unlock Bypass

Word

Byte

3

555

AAA

AA

2AA 55

555

555 20

AAA

Unlock Bypass Program (Note 2 XXX A0 PA PD

11)

Unlock Bypass Reset (Note 12) 2 XXX 90 XXX 00

Chip Erase

Word

Byte

6

555

AAA

AA

2AA 55

555

555 80 555 AA 2AA 55

AAA

AAA

555

Sector Erase

Word

Byte

6

555

AAA

AA

2AA

555

55

555 80 555 AA 2AA 55

AAA

AAA

555

Erase Suspend (Note 13)

1 XXX B0

Erase Resume (Note 14)

1 XXX 30

555 10

AAA

SA 30

Legend:

X = Don't care

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE or CE pulse,

whichever happens later.

PD = Data to be programmed at location PA. Data latches on the rising edge of WE or CE pulse, whichever happens first.

SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A19 - A12 select a unique sector.

Note:

1. See Table 1 for description of bus operations.

2. All values are in hexadecimal.

3. Except when reading array or autoselect data, all bus cycles are write operation.

4. Address bits A19 - A11 are don't cares for unlock and command cycles, unless SA or PA required.

5. No unlock or command cycles required when reading array data.

6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high

(while the device is providing status data).

7. The fourth cycle of the autoselect command sequence is a read cycle.

8. The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more

information.

9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more

information.

10. Command is valid when device is ready to read array data or when device is in autoselect mode.

11. The Unlock Bypass command is required prior to the Unlock Bypass Program command.

12. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass

mode.

13. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.

14. The Erase Resume command is valid only during the Erase Suspend mode.

(November, 2007, Version 1.2)

17

AMIC Technology, Corp.

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