LA3430M
Test Circuit and Internal Equivalent Block Diagram
* : When a polarized electrolytic capacitor is used in your application, the positive pole may be connected to either
pin 2 or pin 3.
SW1 : For characteristics other than separation, place in the A position.
SW2 : For characteristics other than HCC, SNC, place in the A position.
SW3 : Forced monaural of reception mode.
Amp : Bandwidth 100kHz or greater, THD=0.01% or less, input impedance 330kΩ or greater.
No.2720–3/4