MT89L80AN Просмотр технического описания (PDF) - Mitel Networks
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MT89L80AN Datasheet PDF : 15 Pages
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MT89L80
Advance Information
AC Electrical Characteristics† - Processor Bus (Figures 14)
Characteristics
Sym Min Typ‡ Max Units
Test Conditions
1 Chip Select Setup Time
2 Read/Write Setup Time
3 Address Setup Time
4 Acknowledgment Delay
Control Register Read
tCSS
0
tRWS
5
tADS
5
tAKD
52 120
ns
ns
ns
ns CL=150 pF
Control Register Write
tAKD
25
65
ns CL=150 pF
Connection Memory Read
tAKD
62 120
ns CL=150 pF
Connection Memory Write
tAKD
30
53
ns CL=150 pF
Data Memory Read
tAKD
560 1220 ns CL=150 pF
5 Fast Write Data Setup Time
tFWS
0
ns
6 Slow Write Data Delay
tSWD
122
ns
7 Read Data Setup Time
8 Data Hold Time
Read
tRDS
0
tDHT
10
ns CL= 150 pF
90
ns RL=1 KΩ∗, CL=150 pF
Write
tDHT
5
10
9 Read Data To High Impedance
tRDZ
15
50
90
ns
ns RL=1 KΩ∗, CL=150 pF
10 Chip Select Hold Time
tCSH
0
ns
11 Read/Write Hold Time
tRWH
0
ns
12 Address Hold Time
tADH
8
ns
13 Acknowledgment Hold Time
tAKH
50
80
ns RL=1 KΩ∗, CL=150 pF
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel time taken to discharge CL.
DS
VHM
VLM
VHM
CS
VLM
R/W
VHM
VLM
A5
VHM
to
A0
VLM
DTA
VHM
VLM
D7
VHM
to
D0
VLM
2-14
tCSS
tRWS
tADS
*
tAKD
tRDS
*
tSWD
tFWS
Figure 14 - Processor Bus
tCSH
tRWH
tAKH
tDHT
tRDZ
tADH
*
*
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