IDT79R4650
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS — COMMERCIAL TEMPERATURE RANGE—RV4650
(VCC=3.3V ± 5%; TCASE = 0°C to +85°C)
Clock Parameters—RV4650
RV4650
80MHz
RV4650
100MHz
RV4650
133MHz
Parameter
Pipeline clock frequency
MasterClock HIGH
MasterClock LOW
Symbol Test Conditions Min Max Min Max Min Max Units
PClk
50
80
50
100
50
133 MHz
tMCHIGH
tMCLOW
Transition ≤ 5ns
Transition ≤ 5ns
6
—
4
—
3
— ns
6
—
4
—
3
— ns
MasterClock Frequency(5)
—
—
20
MasterClock Period
tMCP
—
25
Clock Jitter for MasterClock tJitterIn(8)
—
—
MasterClock Rise Time
tMCRise(8)
—
—
MasterClock Fall Time
tMCFall(8)
—
—
ModeClock Period
tModeCKP
—
—
NOTES:
10.Operation of the RV4650 is only guaranteed with the Phase Lock Loop enabled.
System Interface Parameters—RV4650(6)
40
40
±250
5
5
256*
tMCP
RV4650
80MHz
Parameter
Symbol
Test Conditions
Data Output(7)
tDM= Min
tDO = Max
mode14..13 = 10 (fastest)
mode14..13 = 01 (slowest)
Data Output Hold tDOH *
mode14..13 = 10 (fastest)
Data Setup
tDS
Data Hold
tDH
trise = 5ns
tfall = 5ns
* 25pf loading on external putput signals, fastest settings
Min Max
1.0
11
2.0
15
1.0
—
7
—
4
—
25
50
20
40
— ±250
—
5
—
5
—
256*
tMCP
RV4650
100MHz
Min Max
1.0
9
2.0
12
1.0
—
6
—
3
—
25
67 MHz
15
40 ns
— ±250 ps
—
4 ns
—
4 ns
—
256* ns
tMCP
RV4650
133MHz
Min Max Units
1.0
9
ns
2.0
12
ns
1.0
—
ns
6
—
ns
3
—
ns
Boot Time Interface Parameters—RV4650
RV4650
80MHz
RV4650
100MHz
RV4650
133MHz
Parameter
Mode Data Setup
Mode Data Hold
Symbol
tDS
tDH
Test Conditions
—
—
Min Max Min Max Min Max
Units
3
—
3
—
3
— Master Clock Cycle
0
—
0
—
0
— Master Clock Cycle
5.8
19