µPD75036
5.3 CLOCK OUTPUT CIRCUIT
The clock output circuit outputs a clock pulse signal on the P22/PCL pin for remote control or for supplying clock
pulses to a peripheral LSI device.
Fig. 5-2 Configuration of the Clock Output Circuit
From the clock
generator
Φ
f X/23
f X/24
f X/26
Selector
Output
buffer
PCL/P22
CLOM3 CLOM2 CLOM1 CLOM0 CLOM
PORT2.2
P22 output
latch
4
Internal bus
Bit 2 of PMGB
Port 2 input/
output mode
specification bit
Remark The clock output circuit is designed so that pulses with short widths do not appear in enabling or disabling
clock output.
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