General Description The ABT16952 is a 16-BIT REGISTERED TRANSCEIVER. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The output pins are guaranteed to source 32 mA and to sink 64 mA.
Features ■ Separate clock, clock enable and 3-STATE output enable provided for each register ■ A and B output sink capability of 64 mA source capability of 32 mA ■ Guaranteed latchup protection ■ High impedance glitch free bus loading during entire power up and power down cycle ■ Nondestructive hot insertion capability
DESCRIPTION The 74ALVCH16543 is a dual octal REGISTERED TRANSCEIVER.
FEATURES • In accordance WITH JEDEC standard no 8-1A • CMOS low power consumption • Direct interface WITH TTL levels • MULTIBYTE flow-through pin-out architecture • 16-BIT TRANSCEIVER WITH D-type latch • Combines 16245 and 16373 type functions in one chip • Back-to-back registers for storage • Output drive capability 50 Ω transmission lines at 85 °C • Separate controls for data flow in each direction • All data inputs have bus hold • 3-STATE non-inverting OUTPUTS for bus oriented applications • Current drive ±24 mA at 3.0 V.
General Description The ABT16543 16-BIT TRANSCEIVER contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. Each byte has separate control inputs, which can be shorted together for full 16-BIT operation.
Features ■ Back-to-back registers for storage ■ Bidirectional data path ■ A and B OUTPUTS have current sourcing capability of 32 mA and current sinking capability of 64 mA ■ Separate control logic for each byte ■ 16-BIT version of the ABT543 ■ Separate controls for data flow in each direction ■ Guaranteed latchup protection ■ High impedance glitch free bus loading during entire power up and power down cycle ■ Nondestructive hot insertion capability
General Description The LVT16952 and LVTH16952 are 16-BIT REGISTERED TRANSCEIVERs. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable, and output enable signals are provided for each register. The LVTH16952 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. The REGISTERED TRANSCEIVER is designed for low-voltage (3.3V) VCC applications, but WITH the capability to provide a TTL interface to a 5V environment. The LVT16952 and LVTH16952 are fabricated WITH an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.
Features ■ Input and output interface capability to systems at 5V VCC ■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH16952) ■ Live insertion/extraction permitted ■ Power Up/Down high impedance provides glitch-free bus loading ■ OUTPUTS source/sink −32 mA/+64 mA ■ Functionally compatible WITH the 74 series 16952 ■ Latch-up conforms to JEDEC JED78 ■ ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V
General Description The ACTQ16540 contains sixteen inverting buffers WITH 3-STATE OUTPUTS designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/receiver. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-BIT operation. The ACTQ16540 utilizes Fairchild Quiet Series™ technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control for superior performance.
Features ■ Utilizes Fairchild FACT Quiet Series technology ■ Guaranteed simultaneous switching noise level and dynamic threshold performance ■ Guaranteed pin-to-pin output skew ■ Separate control logic for each byte ■ OUTPUTS source/sink 24 mA ■ Additional specs for multiple output switching ■ Output loading specs for both 50 pF and 250 pF loads
DESCRIPTION The 74F2952 and 74F2953 are 8-bit REGISTERED TRANSCEIVERs. Two 8-bit back-to-back registers store data flowing in both directions between two bi-directional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (CPXX) provided that the Clock Enable (CEXX) is Low. The data is then present at the 3-STATE output buffers, but is only accessible when the Output Enable (OEXX) is Low. Data flow from ‘A’ inputs to ‘B’ OUTPUTS is the same as for ‘B’ inputs to ‘A’ OUTPUTS.
FEATURES • 8-bit REGISTERED TRANSCEIVERs • Two 8-bit, back-to-back registers store data moving in both directions between two bidirectional buses • Separate Clock, Clock Enable and 3-STATE Enable provided for each register • 74F2952 non-inverting • 74F2953 inverting • AM2952/2953 functional equivalent • ‘A’ OUTPUTS sink 24mA and source 3mA • ‘B’ OUTPUTS sink 64mA and source 15mA • 300 mil wide 24-pin Slim DIP package
DESCRIPTION The 74ABT16952 high-performance BiCMOS device combines low static and dynamic power dissipation WITH high speed and high output drive. The 74ABT16952 is a dual octal REGISTERED TRANSCEIVER. Two 8-bit registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (nCPXX) provided that the Clock Enable (nCEXX) is Low. The data is then present at the 3-STATE output buffers, but is only accessible when the Output Enable (nOEXX) is Low. Data flow from A inputs to B OUTPUTS is the same as for B inputs to A OUTPUTS. Two options are available, 74ABT16952 which does not have the bus-hold feature and 74ABTH16952 which incorporates the bus-hold feature.
FEATURES • Two 8-bit REGISTERED TRANSCEIVERs • Live insertion/extraction permitted • Power-up 3-STATE • 74ABTH16952 incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs • Power-up reset • Multiple VCC and GND pins minimize switching noise • Independent registers for A and B buses • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
DESCRIPTION The 74ALVT16543 is a high-performance BiCMOS product designed for VCC operation at 2.5 V or 3.3 V WITH I/O compatibility up to 5 V. The device can be used as two 8-bit TRANSCEIVERs or one 16-BIT TRANSCEIVER.
FEATURES • 16-BIT universal bus interface • 5 V I/O Compatible • 3-STATE buffers • Output capability: +64 mA/–32 mA • TTL input and output switching levels • Input and output interface capability to systems at 5 V supply • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs • Live insertion/extraction permitted • Power-up 3-STATE • Power-up reset • No bus current loading when output is tied to 5 V bus • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
DESCRIPTION The 74ACT16244 is a low voltage CMOS 16-BIT D-TYPE LATCH and 16 BIT BUS TRANSCEIVER WITH 3-STATE output non inverting fabricated WITH sub-micron silicon gate and double-layer metal wiring C2MOS technology. Both functions can be used as 16 bit or dual octal devices, so the 16 bit TRANSCEIVER can be used ad 8 bit bus buffer plus 8 bit TRANSCEIVER, or only 16 bit buffer in select direction.
■ HIGH SPEED: tPD = 4.8ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 8µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), VIL = 0.8V (MAX.) ■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 4.5V ■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL ■ OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V ■ FUNCTION COMPATIBLE WITH SERIES 16373 AND 16245 (244) ■ IMPROVED LATCH-UP IMMUNITY ■ IMPROVED ESD IMMUNITY
Description The HD74ALVCH162543 can be used as two 8-bit TRANSCEIVERs or one 16-BIT TRANSCEIVER.
Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors • All OUTPUTS have equivalent 26 Ω series resistors, so no external resistors are required.